SiC Inverter for EVs: Loss Calculation and Efficiency Improvement

How to Reduce Losses in SiC Inverters for EVs — Calculation Assembly and Reality of Efficiency Improvement

A 1% increase in conversion efficiency for EV inverters translates to a difference of several kilometers in driving range. When aiming for real-world efficiency improvements rather than catalog values and stepping into the design phase, the first question encountered is "How do we calculate which losses and in what way?" Without correctly decomposing the breakdown of losses, it becomes easy to end up in a situation where efficiency does not improve as expected despite adopting SiC, or where costly improvements prove to be off-target.

While SiC MOSFETs indeed possess superior material characteristics, connecting them to inverter system efficiency improvements requires selecting devices with an understanding of loss generation mechanisms. Here, we will sequentially organize the assembly of loss calculations, SiC-specific considerations, and factors that serve as decision-making material from both design and procurement perspectives.

Breakdown of Inverter Losses — Which is Dominant: "Switching" or "Conduction"?

Inverter losses for EVs are broadly divided into two categories. Switching loss (Esw) is the energy dissipation that occurs at the moment a device switches between on and off states, and it increases in proportion to the switching frequency. Conduction loss (Pcond) is a steady-state loss generated by the product of the on-resistance (RDS(on)) and the square of the current when the device is in the on state. In addition to these two types, gate drive loss and body diode reverse recovery loss also exist, but the ratio of the two main components first determines the design direction.

The most significant improvement when replacing Si-IGBTs with SiC MOSFETs is in switching loss. SiC has an insulation breakdown electric field approximately 10 times higher than silicon, allowing for a thinner drift layer design at the same breakdown voltage. This suppresses carrier accumulation and significantly increases switching speed. In the PWM control adopted by EV main inverters, the upper limit of the switching frequency is directly linked to losses, so this characteristic directly contributes to efficiency improvement.

However, increasing the switching frequency in turn increases the cost of EMI (electromagnetic noise) countermeasures. The optimal balance point in design varies by application; for passenger cars, the 10-20kHz band is frequently adopted, and SiC's advantages are often demonstrated even in this frequency range.

Loss Decomposition by Numbers — What is Effective?

To perform loss calculations, parameters obtained from device datasheets are used. The formula for calculating conduction loss is relatively simple and can be approximated by Pcond = I² × RDS(on) × Dcycle (duty cycle). On the other hand, switching loss is calculated as the sum of Eon (turn-on loss energy) and Eoff (turn-off loss energy) multiplied by the frequency.

For a typical EV inverter (800V/300A class) using SiC MOSFETs, the ratio of switching loss to conduction loss is strongly dependent on the switching frequency. At 10kHz, conduction loss tends to be dominant, while at 20kHz and above, the proportion of switching loss increases.

While this graph shows conceptual ratios, it indicates that as the frequency doubles, switching loss rapidly increases, and the proportion of conduction loss reverses. The situation where improving conduction loss by lowering RDS(on) is outpaced by switching loss when increasing frequency is frequently reported in the field. Deciding which to prioritize for improvement can be organized by first solidifying the operating point and frequency conditions.

SiC-Specific Trade-offs — Can Short-Circuit Withstand Time and On-Resistance Be Achieved Simultaneously?

As loss calculations for SiC inverters progress, an unavoidable question arises: "Can we further reduce on-resistance?" However, this is where a structural trade-off inherent to SiC MOSFETs lies.

Short-circuit withstand time (SCWT) is the time until a device fails when a load short circuit occurs, providing a margin for protective circuits to operate. Increasing channel density to lower on-resistance increases power concentration during a short circuit, tending to shorten this margin time.

So, to what extent can this trade-off be resolved? The difference in approaches among manufacturers has begun to emerge in recent years. Mitsubishi Electric has reported a significant improvement in short-circuit withstand time by introducing a p-type protective layer into their trench-type SiC-MOSFETs. Rohm's fourth-generation SiC MOSFETs are also said to achieve both low RonA and high short-circuit withstand capability through their unique device structure. Microchip's 700V/1200V rated products list a typical short-circuit withstand time of 3μs under specific conditions in their datasheets, which can be referenced as a benchmark for protective circuit timing design.

Impact of Protective Circuits on Loss Calculations — How to Design DESAT Correctly

Often overlooked in discussions on loss calculation is the impact of protective circuit design on device operating points. DESAT (desaturation) functionality is widely used for short-circuit protection of SiC MOSFETs. This is a mechanism where the gate driver monitors the on-state VDS (drain-source voltage) and turns off the transistor when an overcurrent occurs.

When designing DESAT, attention is required for setting the detection threshold (VDESAT) and blanking time. Setting the sensitivity too high can lead to false detections during normal switching transients. Conversely, if it's too loose, there's a possibility that protection may not be in time for devices with short thermal time constants like SiC. SiC has a small die and high current density, leading to faster temperature rise than Si-IGBTs, and protection may not be adequate with the same timing.

Although the design parameters for short-circuit protection circuits do not directly appear in the loss calculation layers, the effective operating conditions change depending on when the protective circuit intervenes. If the design and evaluation processes are treated separately, unexpected behavior may be encountered in the actual device.

The Variable of Temperature Dependence — How Many Times Does Ron Increase Under Real Driving Conditions?

A common error in loss calculation is using the room temperature (25°C) values from the datasheet as is. The RDS(on) of SiC MOSFETs has a positive temperature coefficient, meaning it increases with rising temperature. The specific rate of increase varies by manufacturer and device structure, but it is common for it to be 1.5 to 2 times the 25°C value at 125°C. In real driving conditions, junction temperatures often reach 125-150°C or higher, and omitting this correction can lead to calculated conduction losses being less than half of the actual value.

On the other hand, as temperature rises and RDS(on) increases, the saturation current is limited, which tends to improve short-circuit withstand capability. While this has an advantageous aspect from a protection perspective, it is important to note that it comes as a package with increased conduction losses.

In loss calculation simulations, treating junction temperature as a progression that changes according to the operating point, rather than a fixed value, reduces the discrepancy between calculation results and actual measurements. Some manufacturers offer tools that simulate thermal impedance (Zth) data in combination with gate drive waveforms, and the availability of such support resources can be a clue when making selections.

Beyond Loss Calculation — Consistency with Procurement and Cost

After technically deciding to adopt SiC MOSFETs, another judgment axis emerges: the supplier's supply capability. Even if the optimal device is narrowed down through loss calculations, securing the necessary quantity and voltage grade at the mass production timing is a separate issue.

Currently, major SiC MOSFET manufacturers in the market include Infineon (CoolSiC), onsemi (EliteSiC), Rohm, Mitsubishi Electric, and STMicroelectronics. onsemi offers a portfolio including SiC MOSFETs, diodes, and modules from 650V to 1700V, making it one option from the perspective of full-range support for EVs. The specification values and measurement conditions for short-circuit withstand capability vary among manufacturers, so it is unavoidable to spend time comparing datasheets by aligning conditions.

Improving the accuracy of loss calculations not only enhances design reliability but also directly leads to narrowing down procurement options, such as "Is this device sufficient, or is a higher grade necessary?" Confirming the input values for calculations and confirming specifications with suppliers can speed up decision-making if done in parallel.

This graph shows only values confirmed from Fact Cards. The adoption of 800V battery systems is expanding for EV applications, and demand for 1200V rated grades is increasing. Aligning the adopted voltage rating with operating conditions at an early stage of specification finalization, along with loss calculations, can reduce design changes later on.

Loss calculation is the starting point, not the endpoint. Integrated advancement of short-circuit protection design, temperature management, and supply system confirmation, based on numerically understanding device characteristics — being aware of this flow is the practical procedure for translating SiC inverter efficiency improvements into actual design.