Survival or Destruction: What Determines SiC MOSFET Reliability in Industrial Inverters

When considering SiC MOSFETs for industrial inverter design, discussions often focus on losses and switching speeds. However, a more fundamental and often overlooked question in practical applications is whether the device can survive a load short circuit. The nature of their applications differs between EVs and industrial equipment. Industrial inverters prioritize operational uptime, and the ability to reliably protect the device during an unexpected short circuit directly impacts the overall system reliability.

Why "How Many Microseconds Matter"

Short-circuit withstand time (SCWT) for SiC MOSFETs refers to the duration from the moment a load short circuit occurs until the device is thermally destroyed. In other words, it is the grace period allowed before the protection circuit intervenes.

While many silicon IGBT products have SCWTs around 10μs, SiC MOSFETs generally have shorter times, with some products rated at just a few microseconds. Microchip's SiC MOSFETs (700V/1200V rated) specify an SCWT of typically 3μs under certain conditions in their datasheets. This is less than one-third the figure for IGBTs. While 3μs may sound short, the issue lies in whether the protection circuit design accommodates this short duration.

SiC dies are smaller than silicon dies, resulting in higher current density when conducting equivalent currents. Higher current density means faster temperature rise during a short circuit. If the protection circuit is designed with the same response speed, the thermal stress could reach a critical level in SiC within that time.

Therefore, adopting SiC not only involves replacing devices but also rethinking the entire protection circuit design philosophy. This is a structural aspect worth understanding in advance, both technically and from a procurement perspective.

Three Conditional Variables Determining SCWT

SCWT is not a fixed value but fluctuates depending on operating conditions. Understanding this variation is the starting point for evaluating reliability in real-world environments.

The three conditional variables are drain applied voltage, gate applied voltage, and junction temperature. The more these are "mitigated," meaning lower drain voltage, lower gate voltage, and lower temperature, the longer the SCWT tends to be.

Three Conditions Affecting SCWT (Mitigation Direction)
01

Drain Voltage VDS

Higher VDS increases power density during a short circuit, reducing SCWT. Designing for lower operating points increases SCWT margin.

02

Gate Voltage VGS

Higher VGS increases saturation current, leading to increased heat generation during a short circuit. A lower VGS design leans towards higher withstand capability.

03

Junction Temperature Tj

Higher Tj tends to decrease short-circuit withstand capability. Cooling design and operating temperature margin are effective.

It is important to note that this diagram is a conceptual representation to show how each element "works in the direction of mitigation." Actual numerical values must be confirmed in product datasheets and application notes.

Meanwhile, there is a noteworthy characteristic regarding high-temperature behavior. As SiC MOSFETs heat up, their RDSon (on-state resistance) increases, suppressing saturation current. Paradoxically, this characteristic leads to improved short-circuit withstand capability at higher temperatures. This temperature dependency differs from silicon and is worth considering in operating temperature range design.

How to Design Protection Circuits - The Fundamental Structure of DESAT

Once SCWT is determined, the next question is "Can it be reliably detected and interrupted within that time?" The most widely used method for short-circuit protection of SiC MOSFETs is called DESAT (desaturation) detection.

DESAT is a mechanism that monitors the drain-source voltage (VDS) when the MOSFET is in its on-state and detects an increase in VDS that occurs during a short circuit to shut it down. Under normal operation, VDS is kept low, but during a short circuit, VDS jumps up with the rapid increase in current. This change triggers the protection operation.

The key parameters for designing a DESAT circuit are the DESAT trigger threshold (VDESAT), DESAT current (IDESAT), and the short-circuit blanking time. Blanking time is a setting to ignore transient VDS spikes during switching turn-on as a false detection. If it is too long, shutdown may not occur in time to prevent exceeding SCWT, while if it is too short, false triggers may increase. The fact that SiC's SCWT is short means that the blanking time setting for silicon-based designs will not be suitable.

Three Adjustment Points for DESAT Protection Design
01

VDESAT Trigger Threshold

Determines the sensitivity of short-circuit detection. Too low leads to false triggers, too high to detection delay. Settings must be aligned with the operating voltage range.

02

IDESAT Sense Current

The current value used for DESAT detection. This value, in combination with the diode, affects detection response speed.

03

Short-Circuit Blanking Time

The time to ignore transient VDS spikes during turn-on. With SiC's short SCWT, the accuracy of this setting is crucial for reliability evaluation.

The design flexibility differs depending on whether the DESAT function is integrated into the gate driver IC or configured externally. When selecting a gate driver optimized for SiC, checking if the blanking time setting range is explicitly stated as a specification is a key point for both technical and procurement evaluation.

Short-Circuit Withstand Time vs. On-Resistance: A Fundamental Trade-off Manufacturers Address

Increasing SCWT requires enhancing the device's ability to absorb short-circuit energy structurally. However, this does not necessarily align with reducing on-resistance (Ron). Increasing channel density to achieve low Ron also increases the saturation current flowing during a short circuit, thereby increasing thermal stress. This structural trade-off makes SiC MOSFET design challenging.

Manufacturers are tackling this challenge with different approaches. Mitsubishi Electric improved short-circuit withstand capability by introducing a p-type protective layer in their trench-type SiC-MOSFETs. While trench types allow for higher channel density compared to planar types, electric field concentration at the gate oxide can be an issue, which the p-type protective layer is believed to mitigate.

Rohm aims to achieve both low RonA and high short-circuit withstand capability with a proprietary device structure in their 4th-generation SiC MOSFETs. RonA is the on-resistance per unit area, an indicator of conduction performance per chip area. Improvements in this figure allow for achieving the same loss performance with a smaller chip.

Key Manufacturers' Approaches to Improving SCWT
01

Mitsubishi Electric (Trench Type)

Introduction of a p-type protective layer suppresses electric field concentration at the trench gate, significantly improving short-circuit withstand capability. An approach to resolve high density and protection performance at the structural level.

02

Rohm (4th Generation)

Achieves both low RonA and high short-circuit withstand capability with a proprietary device structure. The generational advancement as the 4th generation is reflected in reliability metrics.

03

Microchip (700V/1200V)

Clearly states SCWT typically 3μs under specific conditions in its datasheet. The transparency of the figure serves as a benchmark for device selection and protection circuit design.

Whether SCWT is clearly stated in the datasheet is a point to focus on during product selection. If it is not stated, the design benchmark for the protection circuit becomes unclear, risking issues surfacing only during evaluation testing. Technical transparency can also be an evaluation criterion for procurement risk.

What to Verify in Evaluation Testing

After selecting the device, reliability evaluation awaits. For industrial inverters, verifying short-circuit withstand capability is an unavoidable step in the design phase. Here's an organized view of "what to check."

First, confirm whether the evaluation conditions match the application's actual operating conditions. As mentioned earlier, SCWT depends on drain voltage, gate voltage, and temperature. The typical values stated in datasheets are under specific conditions, and actual equipment may operate under different conditions. For evaluation testing, verifying SCWT under worst-case conditions (high Vds, high Vgs, high temperature) increases the accuracy of judgment.

Next is the operating timing of the protection circuit. If the SCWT is, for example, 3μs, the total delay from DESAT detection to gate turn-off completion must be less than 3μs. The gate driver's response speed, blanking time setting, and delays due to parasitic inductance in wiring all accumulate, making it difficult to pinpoint where design margins are lost. Measuring and verifying the delay of the entire loop is one of the important objectives of testing.

Loading chart

This graph shows a conceptual breakdown of how each phase of the protection operation consumes time within the 3μs SCWT constraint. Actual values will vary depending on the circuit configuration and component specifications, but it serves as a reference for thinking about time budgeting in the initial design phase. As the margin approaches zero, the risk of protection failing to activate due to component variations or temperature changes increases.

Another point to consider is the degradation behavior under repeated short circuits. Even if a device survives a single short circuit, similar events can occur multiple times in an industrial inverter. The extent to which cumulative stress on the gate oxide and junction affects characteristic changes, and whether this can be obtained as data from repetitive testing, directly relates to the accuracy of long-term reliability evaluation.

What to Select and What to Verify for Decision Making

Summarizing the reliability evaluation for SiC MOSFETs in industrial inverters, the core question converges on one point: "Are the SCWT and the protection circuit design aligned under the worst-case conditions of the actual application?"

On the device side, checking if SCWT is clearly stated in the datasheet, along with its measurement conditions, serves as a guideline for selection. The solutions to trade-offs (such as Mitsubishi Electric's p-type protective layer or Rohm's 4th-generation structure) differ by manufacturer, and determining which approach suits your system's operating conditions requires cross-referencing application notes with evaluation data.

On the circuit design side, the core lies in whether the DESAT protection blanking time is appropriately set relative to SiC's SCWT. Directly reusing gate drivers designed for silicon IGBTs may lead to mismatched response speed assumptions. Selecting a gate driver and selecting a SiC device should naturally be evaluated together.

From a procurement and quality perspective, the transparency of evaluation conditions and the manufacturer's application support system serve as indicators for long-term risk management. Even if the SCWT value is small, if a supplier provides robust design guidance to accommodate it, system-level adaptation is feasible. Conversely, even with a large numerical value, if operational guarantees under actual conditions are ambiguous, the accuracy of evaluation decreases. Combining technical figures with the quality of information disclosure enhances the precision of decision-making material.