Infineon CoolSiC Product Lineup Updates

CoolSiC Makes a Move – What Infineon's Lineup Update Signifies

Infineon, a leader in the SiC MOSFET market, is progressively updating its CoolSiC family lineup. Viewing this not merely as product additions but as a strategic move combining expanded voltage ratings with gate structure enhancements reveals what this update is posing as a question to the industry as a whole.

The SiC market is currently at a juncture where manufacturers are being compelled to choose between prioritizing performance and reliability. Infineon's actions must be understood within this context.

The "3μs Short-Circuit Withstand Time" Barrier and the Reality Facing Manufacturers

One of the initial hurdles designers encounter when adopting SiC MOSFETs is the Short-Circuit Withstand Time (SCWT). This metric indicates the grace period before a protection circuit must complete its operation after a load short-circuit occurs, preventing device destruction.

Microchip's SiC MOSFETs (700V/1200V rated) list SCWT under specific conditions as typ. 3μs in their datasheets. This figure is significantly shorter than the over 10μs for Si-IGBTs, imposing stricter demands on the response speed of protection circuits. When evaluating Infineon's lineup update, understanding where the company is focusing its efforts in this area serves as a crucial technical and business decision-making criterion.

Further complicating the issue is the trade-off between short-circuit withstand time and on-resistance (Ron).

Reducing Ron decreases switching and conduction losses, but this often comes at the expense of lower short-circuit withstand capability. For EV and industrial inverters, which demand both high efficiency and high reliability, resolving this trade-off is at the core of device design.

Where Competitors Are Seeking to Differentiate

In response to this challenge, the approaches taken by various companies are showing interesting divergences. Mitsubishi Electric has achieved a significant improvement in short-circuit withstand time by introducing a p-type protection layer into its trench SiC MOSFET structure. Rohm, with its 4th-generation SiC MOSFETs, aims to achieve both low RonA and high short-circuit withstand capability through its proprietary device structure. onsemi, with its EliteSiC brand, offers a full portfolio of SiC MOSFETs, diodes, and modules ranging from 650V to 1700V.

What this grid illustrates is a scenario where each company is attempting to solve the "same problem from different angles." When selecting products, it is essential to examine not only the specifications but also the structural approach used to achieve those figures, which can provide clues for more accurate reliability assessments.

Infineon's trench gate structure is said to alleviate electric field concentration on the gate oxide compared to planar structures. If the lineup update extends this structural advantage to a wider range of voltage and current ratings, it can be interpreted as an effort to strengthen the "reasons to choose us for reliability" against competitors.

Why SiC is a "Difficult Device" – The Interplay of Die Size and Protection Circuits

To accurately evaluate the specifics of the CoolSiC update, it is crucial to understand the inherent physical limitations of SiC devices.

SiC devices have smaller dies and higher current densities compared to Si. When the same current flows, the amount of heat generated per unit area is greater than with Si. This means that "the temperature rises faster during a short-circuit event," consequently demanding shorter response times from protection circuits than for Si.

This characteristic directly impacts the design of protection circuits. A commonly used short-circuit protection method for SiC is the DESAT (desaturation detection) function. This mechanism monitors the drain-source voltage (VDS) in the on-state and turns off the gate when the device deviates from its saturation region due to overcurrent – that is, when VDS rapidly rises. Key parameters in protection circuit design include the DESAT trigger threshold (VDESAT), DESAT current (IDESAT), and the short-circuit blanking time (a masking period to prevent false detection).

What is often overlooked here is the "temperature dependency" of short-circuit withstand time. At higher temperatures, RDSon increases, limiting the saturation current, which tends to relatively improve short-circuit withstand capability. In other words, the catalog value of "typ. 3μs" is for specific temperature and voltage conditions, and confirmation of conditions tailored to the actual operating environment serves as a vital assessment factor.

*This chart is intended to show qualitative trends, not absolute values, and organizes the dependencies described in the Fact Card. It should be used to reference which conditions affect withstand time, rather than as a source of numerical data.*

In actual designs, these condition dependencies are considered when tuning each DESAT parameter under worst-case conditions. Whether the CoolSiC lineup update is accompanied by an expansion of compatible gate driver ICs is a point that needs to be confirmed for system-wide protection design.

Decision-Making Criteria for CoolSiC Updates from Both Technical and Procurement Perspectives

So, what should be examined in light of this lineup update? Let's organize this by separating technical and procurement aspects.

From a technical standpoint, the evaluation begins with understanding the voltage and current ratings covered by the updated products, as well as the balance point set for short-circuit withstand time and Ron. Data sheet information regarding the generation of the trench gate structure and warranty conditions for gate oxide reliability (e.g., maximum Vgs, recommended gate bias values) are also important considerations. Regarding the condition dependency of short-circuit withstand time, whether the conditions for drain voltage, gate voltage, and temperature are clearly specified will influence the margin for subsequent protection circuit design.

From a procurement perspective, a key comparison point is onsemi's comprehensive EliteSiC offering from 650V to 1700V. While Infineon also covers multiple voltage ratings, platform consistency – including package compatibility, standardization of gate drive requirements, and consistent provision of reliability data – impacts procurement costs and evaluation efforts when using multiple models.

This grid does not indicate absolute superiority or inferiority; rather, it can be used as a procedure to organize "what to check and in what order" based on your company's application requirements.

The Next Question is "To What Extent Can We Ensure Margin in Protection Circuit Design?"

As the performance of SiC devices improves, the perspective of "whether the system as a whole is viable, including protection circuits" is gaining more importance than the mere competition of individual device specifications. If Infineon is increasingly promoting CoolSiC in conjunction with gate drivers, this can be seen as a strategic decision based on this trend.

When designing protection circuits at the 3μs short-circuit withstand time level, determining the delay from DESAT detection to gate turn-off within an acceptable budget is a question that cannot be answered solely by device manufacturer datasheets. It is a design problem involving the chain of the gate driver IC used, PCB layout, and the response times of photocouplers and isolation amplifiers. Whether the CoolSiC update is directed towards establishing this chain at the system level is the next point to confirm.