Power Semiconductor Market Restructuring Map 2026

Where is the epicenter of restructuring in the power semiconductor market?

Predictions from multiple research firms forecast the global market for SiC power semiconductors to reach approximately $3 billion in 2025 and exceed $10 billion by 2030. However, the current focus among industry players is not on "growth" but on "restructuring." The question is shifting from "who will capture the market" to "who will survive."

The market adjustment from 2024 to 2025, characterized by slower-than-expected EV demand, excess inventory, and price pressure, is not merely a supply-demand cycle. It has starkly revealed the disparities in players' financial strength and technological capabilities. In this sense, the "2026 edition" restructuring map requires a fundamentally different interpretation than one from a growth phase.

Deconstructing "Restructuring": What's Happening Across Three Layers

A simple summary of the power semiconductor market restructuring would be too superficial. In reality, distinct movements are occurring at three layers – materials, devices, and the supply chain – and these layers influence each other.

At the material layer, the competition between two wide bandgap (WBG) semiconductors, SiC and GaN, continues. WBG refers to a category of semiconductors with bandgap energy larger than silicon (Si), offering material properties suitable for high-voltage, high-temperature, and high-frequency environments. While SiC is primarily used for devices rated around 1200V and GaN for those below 650V and high-frequency switching, their boundaries are becoming fluid.

At the device layer, performance differences between generations of SiC MOSFETs are rapidly widening, meaning simply "using SiC" no longer differentiates a product from competitors. Of particular note is the trade-off between short-circuit withstand time (SCWT) and on-resistance (Ron). The ability to achieve both is becoming a decisive evaluation criterion in device selection and competitive comparisons.

At the supply chain layer, the competition to transition to 8-inch SiC wafers is progressing concurrently with the uneven distribution of procurement risks. As exemplified by Mitsubishi Electric's strengthened partnership with Coherent for the joint development of 8-inch SiC substrates, device manufacturers are increasingly engaging in upstream wafer production.

Understanding "what is changing at which layer" rather than treating these three layers as separate issues is the starting point for interpreting the restructuring map.

The Generational Competition in SiC MOSFETs: The "Hidden Metric" of Short-Circuit Withstand Time

While on-resistance and breakdown voltage are often the first performance metrics discussed for SiC MOSFETs, another indicator has caused field issues: short-circuit withstand time (SCWT). This parameter indicates the duration a device can withstand before failure during abnormal conditions like motor lock or arm short-circuit, effectively providing a grace period for protection circuits to operate.

The value of SCWT is critical because it is directly linked to protection circuit design. If the time it takes for the overcurrent detection to turn off the gate exceeds the device's limit, protection will not be timely. Microchip's 700V/1200V SiC MOSFETs specify a typical SCWT of 3μs under certain conditions on their datasheets. This figure serves as a reference for protection circuit design and is inseparable from gate driver selection.

SCWT is not a fixed value and varies depending on conditions. Higher drain-source voltage, higher gate voltage, and lower junction temperature tend to decrease the withstand time. Conversely, relaxing these conditions can improve it. It has also been observed that in high-temperature environments, RDSon increases, limiting saturation current and thus enhancing short-circuit resistance.

This is where differences in design approaches among competitors emerge. Mitsubishi Electric has significantly improved SCWT by introducing a p-type protection layer in their trench-type SiC MOSFETs. Rohm's 4th generation SiC MOSFETs achieve a balance of low on-resistance and high short-circuit withstand capability through their proprietary device structure. The crucial point is not simply which is "better," but that different design approaches lead to behavioral differences in specific applications.

SiC dies are smaller and have higher current densities compared to Si. Consequently, temperature rise during abnormalities is faster, and the demands on protection circuit response times become more stringent. This characteristic also imposes design constraints on the gate driver side.

Protection Circuit Design Variables: Where Does the DESAT Function Make a Difference?

The precision of protection circuit design is as crucial as the short-circuit withstand capability of the device itself. DESAT (desaturation) detection is widely used for SiC short-circuit protection. This mechanism monitors the drain-source voltage (VDS) during the on-state and detects VDS rise due to overcurrent, triggering the gate to turn off.

Several design variables are involved in implementing the DESAT function. The typical parameters include the trigger threshold voltage (VDESAT), the DESAT detection current (IDESAT), and the short-circuit blanking time – an ignored period to prevent erroneous detection of transient VDS rise immediately after turn-on. Incorrect settings for these parameters will lead to either excessive false trip-outs or insufficient protection.

The greater the number of design variables, the more critical the combination of the device and the gate driver becomes. Even if the SCWT value on the datasheet is a typical 3μs, it is meaningless if the protection circuit's response time exceeds this duration. Conversely, even with a device having a shorter SCWT, field reliability can potentially be maintained by enhancing the protection circuit's accuracy. This structure, where the effective protection performance is determined by the combination of the device and the circuit, is an aspect that cannot be fully evaluated by comparing device specifications alone.

Interpreting the Competitive Landscape: Who is Competing Where?

Describing the competitive landscape of SiC power semiconductors in 2026 solely on the axes of "price and performance" provides insufficient information. In reality, companies' positions differ along three axes: voltage rating, application, and supply system.

onsemi offers a comprehensive SiC portfolio, including SiC MOSFETs, SiC diodes, and SiC modules across voltage ratings from 650V to 1700V, emphasizing high efficiency due to low power loss and improved system reliability with their EliteSiC brand. Rohm highlights the achievement of both low RonA and high short-circuit withstand capability in its 4th generation devices, while Mitsubishi Electric differentiates itself through structural improvements like introducing a p-type protection layer into trench-type structures. Comparisons with Infineon's CoolSiC become more easily assessed by organizing them by breakdown voltage, application, and design philosophy.

This chart indicates the maximum breakdown voltage. Actual competitive relationships are determined by performance, cost, and supply stability within the same voltage rating bands. The 1200V band is where multiple manufacturers compete most intensely, and comparisons of detailed specifications like SCWT and Ron become crucial for selection.

Competition with silicon technology also persists. Toshiba Device & Storage's triple-gate IGBT, which offers up to a 40.5% reduction in loss, remains a strong option in cost ranges where replacement with SiC is not self-evident. The restructuring map needs to be viewed not only through internal SiC competition but also along the Si versus SiC axis.

Supply Risks and Technical Trade-offs: Decision Criteria Where Design and Procurement Intersect

The selection of SiC devices involves decisions where technical specifications and procurement risks are inextricably linked. Dependency on specific manufacturers, the progress of the 8-inch wafer transition, and upstream involvement in wafer procurement exist as separate axes from the "performance evaluation" of the design team, yet both are simultaneously questioned during actual selection.

The trade-off between short-circuit withstand time and on-resistance is not only an issue of the device's internal structure but also a matter of "how it is used," depending on the application and design margins. While technologies are being developed by various companies to resolve this trade-off through structural improvements, it cannot be judged solely by datasheet figures; verification under actual operating conditions is essential.

From the procurement side, questions are increasingly directed towards the design team asking, "Why must this specific manufacturer be chosen?" To answer these questions, concrete evidence such as "alignment of SCWT and gate driver," "differences in RonA by generation," and "risk diversification of the supply system" is required. When technical selection reasons and procurement risk assessments can be discussed in the same context, internal decision-making processes become faster.

Beyond 2026: What Should We Be Tracking?

Organizing the interpretation of the restructuring map helps narrow down the variables to track beyond 2026.

Whether the transition to 8-inch SiC wafers becomes mainstream or 6-inch wafers remain dominant will directly impact the trend of device costs. As the joint development between Mitsubishi Electric and Coherent indicates, upstream involvement by device manufacturers in wafer production could alter the cost structure. Whether GaN's voltage capability surpasses 650V and approaches the 1200V class is another variable that could change the competitive landscape for SiC. With Renesas' acquisition of Transphorm, the integration of GaN into power semiconductor portfolios is accelerating.

In terms of device technology, the extent to which next-generation designs have progressed in structurally resolving the trade-off between short-circuit withstand time and on-resistance will serve as an indicator of the pace of generational shifts. Roadmap updates from companies like Rohm, Mitsubishi Electric, and Infineon are important tracking targets from a technology planning and R&D perspective.

In terms of price and supply, the timing of demand recovery after the inventory adjustment from 2024 to 2025, and the disparity in the pace of manufacturing capacity expansion by each company, will determine whether the market swings towards the next supply shortage or surplus. This outlook also influences the medium-term strategies of procurement departments.

The restructuring map should be used as a guide not to read "who is strong now," but to understand "what will change when which variable shifts." Continuously updating this perspective will be beneficial for both investment and design decisions.