Evaluating the Adoption of ROHM's 5th Generation SiC MOSFET

What to Check First When Evaluating ROHM's 5th Generation SiC MOSFETs

As SiC MOSFET generations advance, many are asking, "I want to evaluate the 5th generation, but where should I start?" Considering the 4th generation's ability to achieve both low on-resistance (RonA) and high short-circuit withstand time (SCWT), the starting point for evaluating the 5th generation should be to simultaneously assess the device's standalone specifications, its compatibility with protection circuits, and the margin in thermal design.

SiC MOSFETs have smaller dies and higher current densities compared to Si devices. This leads to faster temperature increases and shorter failure times after a short circuit occurs. These characteristics fundamentally alter the design requirements for protection circuits compared to Si. As generations advance and on-resistance decreases, a re-evaluation of the protection system becomes necessary. This is why adoption evaluation cannot end with simply checking datasheet numbers.

How to Interpret the Short-Circuit Withstand Time (SCWT) Metric

Short-circuit withstand time (SCWT), also denoted as Tsc, indicates the time until a device fails when a load short circuit occurs. In other words, it represents the available grace period before the protection circuit can detect and interrupt the fault.

This value is truly meaningful not when read as "X μs" in isolation, but when cross-referenced with the speed at which the protection IC can respond. For instance, the datasheet for Microchip's 700V/1200V SiC MOSFETs specifies a typical value of 3 μs under certain conditions. This 3 μs is not a long duration. When the blanking time and detection delay of industrial gate drivers are summed, the margin shrinks further.

An often-overlooked point is "under what conditions was this withstand time measured?" The withstand time changes depending on the drain applied voltage, gate voltage, and junction temperature. If the conditions are relaxed, the withstand time tends to increase; conversely, if the actual operating conditions are more severe, the limit may be reached in less time than indicated on the datasheet.

During the evaluation phase, confirming the short-circuit withstand time under the conditions of your system's maximum bus voltage, gate voltage, and operating temperature serves as the baseline for design and reliability assessment.

The Trade-off Between On-Resistance and Short-Circuit Withstand Time: How Has It Changed Across Generations?

In SiC MOSFET design, low on-resistance and high short-circuit withstand time are inherently opposing goals. Lowering on-resistance requires increasing channel density, which can easily lead to excessive current during a short circuit. This structural trade-off is at the core of the technical differences between generations.

ROHM's 4th generation SiC MOSFETs are reported to achieve both low RonA and high short-circuit withstand time through their unique device structure. While detailed information for the 5th generation is not yet provided in the fact card, it is presumed that this direction has been continued and strengthened. Meanwhile, Mitsubishi Electric has adopted an approach that significantly improves short-circuit withstand time by introducing a p-type protective layer in their trench SiC-MOSFETs, revealing that manufacturers employ different structural solutions.

Technical structural differences also become comparison points in adoption evaluation. How a specific structure aligns with your system's operating conditions (switching frequency, cooling method, assumed frequency of short circuit occurrence, etc.) can be determined not just by datasheet numbers but also through application notes and measurements using evaluation boards.

Compatibility with Protection Circuit Design: How Deeply Should the DESAT Parameter Be Considered?

The DESAT (desaturation) function plays a central role in implementing short-circuit protection. It refers to a mechanism where the gate driver turns off the power transistor by monitoring the on-state drain-source voltage (VDS) and detecting an increase in VDS due to overcurrent. This is one of the most commonly used methods for short-circuit protection in SiC MOSFETs.

To ensure the DESAT function operates correctly, several parameters must be adjusted to match the device being used. The DESAT trigger threshold (VDESAT), DESAT current (IDESAT), and short-circuit blanking time are typical design variables. If these settings are incorrect, problems such as "failure to detect a short circuit" or "erroneous tripping during normal operation" can occur.

*Actual values vary by device, so here we organize the roles of the three parameters and points to consider during design.*

A crucial point here is that as the temperature of SiC devices increases, their RDSon increases, which in turn limits the saturation current. This means that higher temperatures tend to improve short-circuit withstand capability. This characteristic implies that the protection circuit should be evaluated under worst-case operating conditions at lower or normal temperatures. Evaluating only at high temperatures may lead to more severe situations during short circuits at lower temperatures than anticipated.

Four Axes to Confirm When Evaluating the 5th Generation

When proceeding with the adoption evaluation of ROHM's 5th generation SiC MOSFETs, the focus shifts from "whether specifications are good or bad" to "compatibility with the overall system." Having the following four axes as an evaluation framework allows for consistent discussions from design consideration to procurement decisions.

Among these four axes, ①, ②, and ③ are central during the design phase. ④ becomes relevant as mass production is considered. Prioritizing inquiries to the supplier's application support early in the evaluation process can reduce redundant evaluation efforts.

Why "Reading the Datasheet" Isn't Enough

Evaluating SiC MOSFET adoption is challenging because the device's performance is inseparably linked to three peripheral designs: protection circuits, gate drivers, and thermal design. If protection circuits familiar from Si devices are used without modification, there is a risk of insufficient response time margin. SiC's smaller die and higher current density lead to a faster temperature rise, structurally requiring shorter protection times.

With companies like ROHM aiming for both low RonA and high short-circuit withstand time in their 4th generation, and Mitsubishi Electric enhancing withstand time with a p-type protective layer, the current situation with different architectural approaches from each manufacturer means that the question "Which manufacturer is better?" should be rephrased to "Which combination is feasible under my system conditions?" to advance evaluation.

Evaluating the 5th generation builds upon the experience of teams that have evaluated the 4th generation. Conversely, for systems adopting the 5th generation for the first time with SiC, the proficiency in protection circuit design is a prerequisite before the novelty of the generation. This is a point to consider when estimating the evaluation cost in this technology area.