Key Considerations for Selecting SiC Gate Drivers

When selecting a SiC-compatible gate driver, "protection time" is the first thing to check

As SiC MOSFETs become more widespread, the selection of gate drivers increasingly determines the quality of the design. Why are gate drivers so crucial? The answer is simple: SiC devices have smaller dies and higher current densities, leading to significantly faster temperature rises during short circuits compared to silicon (Si) devices. If protective circuits are designed with the same approach as for Si devices, it could result in the worst-case scenario where the device fails before the protection activates.

Without understanding this characteristic when selecting a gate driver, even the most excellent SiC MOSFETs will not guarantee the reliability of the entire system. Conversely, by mastering the specifications of gate drivers, the limitations of the devices and the requirements of protective circuits become clearly connected.

Why SiC "Fails Quickly" - Where Si-Era Common Sense No Longer Applies

When replacing SiC with systems designed for conventional Si power devices, the concept of short-circuit withstand time (SCWT) is often overlooked. SCWT refers to the time until a device is destroyed in the event of a load short circuit, essentially representing the grace period for protective circuits to operate.

The reason SiC devices are sensitive to this timeframe is their high current density. A smaller die means higher heat generation per unit area when the same current flows. While Si devices might have a margin of over 10μs, this shrinks to the order of a few microseconds for SiC. For Microchip's 700V/1200V SiC MOSFETs, the datasheet specifies a typical SCWT of 3μs under certain conditions.

Whether 3μs is "long or short" is debatable when considering the time it takes for a protection IC to detect, judge, and complete the gate-off process. To ensure reliable protection operation within this timeframe from the gate driver side, the response speed of the detection circuit and the blanking time setting are directly involved. Approaching gate driver datasheets with this problem in mind helps narrow down the parameters to check.

How to Interpret DESAT Protection - Parameter Meanings and Setting Considerations

DESAT (desaturation) detection is widely used for short-circuit protection of SiC MOSFETs. This mechanism monitors the drain-source voltage (VDS) during the ON state and turns off the gate when VDS rises due to overcurrent. Its implementation advantage is that it can detect short circuits without requiring a separate current sensor.

There are three main parameters to consider when implementing DESAT protection: the trigger threshold voltage (VDESAT), the detection current (IDESAT), and the short-circuit blanking time. Blanking time is a "waiting period for detection" to prevent false detection of temporary VDS rises immediately after switching turn-on. If this value is too long, it delays the detection of an actual short circuit; if it's too short, noise can cause erroneous trips.

In design practice, "determining the blanking time" often presents the initial challenge. Some gate driver ICs allow for blanking time adjustment with external resistors and capacitors, offering flexibility that aids optimization in later stages. Conversely, if an IC with a fixed blanking time is used, changes cannot be made later, necessitating thorough prior verification of its compatibility with the device's SCWT.

The Trade-off Between Short-Circuit Withstand Time and On-Resistance - Manufacturers' Solutions

A common discussion point when selecting SiC MOSFETs is the trade-off between short-circuit withstand time and on-resistance (Ron or Ron×A). When aiming to increase short-circuit withstand time, the device's internal structure tends to increase on-resistance, which directly leads to increased losses. How each company resolves this trade-off has become a point of product differentiation.

Mitsubishi Electric takes an approach to significantly improve short-circuit withstand time by introducing a p-type protective layer in their trench-type SiC-MOSFETs, aiming for characteristic synergy at the structural level. Rohm claims to have achieved both low RonA and high short-circuit withstand time with their proprietary device structure in their 4th-generation SiC MOSFETs.

Given this trade-off, gate driver selection cannot be considered in isolation from device selection. A superior protective function in the gate driver expands the scope for safely operating devices with relatively shorter SCWTs. Conversely, using a gate driver with limited protective functions requires a greater margin in the device's SCWT, potentially leading to increased on-resistance. From both design and procurement perspectives, it's important to view gate drivers and devices as a "set" when examining specifications.

Temperature Conditions and Applied Voltage - Understanding Parameters That Affect SCWT

Short-circuit withstand time is not a fixed value; it varies with operating conditions. The three most critical conditions are drain applied voltage, gate applied voltage, and junction temperature. Generally, as these conditions are relaxed, SCWT increases. This means that even with the same device, there are "comfortable" and "tight" states depending on the operating conditions.

Regarding high-temperature behavior, a seemingly paradoxical phenomenon has been observed. As SiC MOSFETs operate at higher temperatures, their RDSon (on-resistance) increases, which in turn suppresses the saturation current during a short circuit. This is seen as a factor that improves short-circuit robustness. However, this only refers to the "instantaneous saturation current being lower," and separate attention is required for prolonged heat accumulation.

Understanding these dependencies is crucial for fine-tuning gate driver protection settings in actual design flows. For example, a typical procedure involves checking if the DESAT detection is timely under the combination of the worst-case drain voltage and the lowest junction temperature (such as during cold startup), where SCWT is shortest.

This graph illustrates the tendency that conditions with high drain voltage and gate voltage, and low junction temperature, are the most stringent for SCWT. In actual worst-case condition design, verifying the margin of the protective circuit starting from the combination of these three conditions serves as the basis for judgment.

Actual Selection Checklist - What to Check and in What Order

Based on the preceding discussion, the items to check when selecting a SiC-compatible gate driver become clear. However, it is more effective to view this as a process of ensuring consistency between device and gate driver datasheets rather than simply "filling out a list," which can reduce oversights.

The first thing to confirm is the SCWT of the SiC MOSFET to be used, under which conditions it applies, and what its value is. Verify if the conditions (temperature, voltage) stated in the datasheet match the actual operating conditions. If the conditions differ, additional evaluation or conservative margin allocation will be necessary.

Next, examine parameters from the perspective that the difference between the gate driver's DESAT blanking time and the SCWT becomes the effective protection margin. Whether the blanking time is adjustable directly impacts flexibility in later stages; thus, using an IC with a fixed value during the prototype phase makes later adjustments difficult.

Isolation withstand voltage (dielectric strength and common-mode transient immunity: CMTI) is also an indispensable check. SiC assumes high-speed switching, generating high dV/dt. Using a gate driver with low CMTI can lead to false triggers.

The importance scores in this graph are merely guidelines for selection priority; the weighting may vary depending on the application. However, the two items—consistency between SCWT and blanking time, and CMTI—tend to be common initial checks for all applications.

Finally, in cases where device selection and gate driver selection proceed separately, the confirmation of their compatibility is often postponed until the final stage. Establishing the perspective that aligning the SCWT conditions of candidate devices with the gate driver's protection specifications early on can mitigate design change risks in later stages is beneficial both technically and commercially.